Hi All,
I just found a different behavior of expression transformation in inforamtica and was eager to post it.
You all were aware of informatica expression transformation, like creating output ports, variable ports and all, lets see the below scenario how it works.
Suppose there are few inputs ports in and out ports dragged from Source Qualifier, we have created a variable port and assigned a input port value to it and then we have created a output port below the variable port and assigned the variable to it. Now when we debug it the variable port contains the input port value and the output port contains the input port value it self. But when we make the variable port is below the output port. For the first record the variable port returns null value then in the output port contains null value. For the Second record the variable port contains the previous first record value, and it goes like wise.
For any assistance Post me
Thanks,
Ameen.
I just found a different behavior of expression transformation in inforamtica and was eager to post it.
You all were aware of informatica expression transformation, like creating output ports, variable ports and all, lets see the below scenario how it works.
Suppose there are few inputs ports in and out ports dragged from Source Qualifier, we have created a variable port and assigned a input port value to it and then we have created a output port below the variable port and assigned the variable to it. Now when we debug it the variable port contains the input port value and the output port contains the input port value it self. But when we make the variable port is below the output port. For the first record the variable port returns null value then in the output port contains null value. For the Second record the variable port contains the previous first record value, and it goes like wise.
For any assistance Post me
Thanks,
Ameen.
